Kartik Agarwal

Implement Nearest Neighbor using Cross validation process and check for efficiency of data partition and estimation parameters. Evaluate it across platforms using Matlab, R , Python libraries and functions. Also develop and implement the procedure in Java

Covered diverse perspectives from distributed systems and programming languages, to formal verification and algorithms, identify abstractions that lower the barrier for innovation inside the network with faculty staff.

Design and develop all layers of Sensor Mote platform, study and analysis of power efficient protocols like 6LoWPAN, Low power Bluetooth and simulate result for a cloud based IoT system and perform knowledge extraction using machine learning algorithms using Weka tool.

A general overview of MSP 430 and ARM Cortex M3 Architecture, Instruction Set and Clock Software development in C and Assembly, Polling and Interrupts, Low Power Modes Digital I/O interfaces,(ADCs), Serial Communication (UART, SPI, I2C), Embedded Wi-Fi using Code Composer Studio, JTAG, lab equipment.

To study, analyze and stimulate results for STTRAM-DRAM Hybrid memory system.
Optimize energy consumptions for different processor architectures implementing various algorithms for paging and replacement algorithms.

Study, analyses and design of packet formats and design, performance trade-off at various layers of IP (like b/w application and transport; transport and network) for RTP and wireless protocols standards in team of 4.
Simulated a model for mobile adhoc IP network for real time media services and evaluated QoS offered by the design using NS2 tool(python).

Simulate to compare the processor performance and memory cache design to optimizing cycles per instructions with various modifications in cache size ,level, associativity and cache block size

Optimization of Physics Engine to simulate motion of a ball under gravity and elastic collision with fixed obstacles. Using C language on Texas Instrument's ARM Cortex M4 based Stellaris® microcontroller, motion of a ball under gravity was simulated and the results were shown in real time on a PC. Communication between the microcontroller and the PC was established using UART interface and Java GUI was designed to show the moving balls and their collision in real time on the PC screen.

Team based project to define, code and implement an automatic rover system that handles priority assigned tasks and executes in real time environment (VxWorks) with timing constraints.
Various methodologies and skills like coding in C, java, handling and communicating with sensors and device drivers (USB, camera) and timing protocols were involved.

Cache design choices (i.e. number of levels, size, associativity, replacement policy etc.) affect the performance of a microprocessor. In this project, we tune the cache hierarchy of an Alpha microprocessor for 4 individual benchmarks.
The cache design parameters modified were:
Cache levels: One or two levels, for data and instruction caches.
Unified caches: Selection of separate vs. unified instruction/data caches. For example, you can have separate L1 caches and a unified L2… Show more

Cache design choices (i.e. number of levels, size, associativity, replacement policy etc.) affect the performance of a microprocessor. In this project, we tune the cache hierarchy of an Alpha microprocessor for 4 individual benchmarks.
The cache design parameters modified were:
Cache levels: One or two levels, for data and instruction caches.
Unified caches: Selection of separate vs. unified instruction/data caches. For example, you can have separate L1 caches and a unified L2 cache.
Size: Cache size, one of the most important choices.
Associativity: Selection of cache associativity (e.g. direct mapped, 2-way set associative, etc.).
Block size: Block size of the cache, usually 64 or 32 bytes.
Block replacement policy: Selection between FIFO, LRU and Random Show less

Implemented a 16 bit ALU using the IBM 130nm kit; involving architecture design, RTL design, verification, synthesis, optimization, placement and routing, postlayout simulation and testing.
Gate level synthesis performed using Synopsys tools; Routing performed using Encounter.

Designed, built and tested the communication system including Antennas, Transceivers and TNC’s and verify its working after deployment on system with other equipments such as power and microcontroller devices.

Developed a circuit that makes high speed and collision free communication between multiple devices or nodes using Freescale HCS-12 board to be deployed on heavy vehicles